Hongchang Qiao, Chenchang Zhan, Jun Yi, Lidan Wang
{"title":"A Low-Power CMOS Voltage Reference with Current Loading Capability","authors":"Hongchang Qiao, Chenchang Zhan, Jun Yi, Lidan Wang","doi":"10.1109/CICTA.2018.8705723","DOIUrl":null,"url":null,"abstract":"This paper presents a low power subthreshold CMOS voltage reference (CVR) with current loading capability. Based on the classical 2T CVR to achieve low temperature coefficient (TC), a sourcing PMOS is appropriately biased through a local negative feedback loop. Current loading capability is achieved without relying on an output buffer. The proposed CVR is designed in a standard 0.18-μm CMOS process. Simulation results show that the CVR is capable of delivering 300 μA while the generated Vref has less than 0.42% reduction. The minimum supply voltage is 0.5 V and typical power consumption is 3 nW. It achieves an average TC of 9 ppm/°C from -20 °C to 135 °C, line sensitivity of 0.069 %/v and power supply rejection of -65 dB@100Hz.","PeriodicalId":186840,"journal":{"name":"2018 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICTA.2018.8705723","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents a low power subthreshold CMOS voltage reference (CVR) with current loading capability. Based on the classical 2T CVR to achieve low temperature coefficient (TC), a sourcing PMOS is appropriately biased through a local negative feedback loop. Current loading capability is achieved without relying on an output buffer. The proposed CVR is designed in a standard 0.18-μm CMOS process. Simulation results show that the CVR is capable of delivering 300 μA while the generated Vref has less than 0.42% reduction. The minimum supply voltage is 0.5 V and typical power consumption is 3 nW. It achieves an average TC of 9 ppm/°C from -20 °C to 135 °C, line sensitivity of 0.069 %/v and power supply rejection of -65 dB@100Hz.