M. Hua, Zhaofu Zhang, Jin Wei, Jiacheng Lei, Gaofei Tang, K. Fu, Yong Cai, Baoshun Zhang, K. J. Chen
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引用次数: 95
Abstract
By employing an interface protection technique to overcome the degradation of etched GaN surface in high-temperature process, highly reliable LPCVD-SiNx gate dielectric was successfully integrated with recessed-gate structure to achieve high-performance enhancement-mode (Vth ∼ +2.37 V @ Id = 100 μA/mm) GaN MIS-FETs with high stability and high reliability. The LPCVD-SiNx/GaN MIS-FET delivers remarkable advantages in high Vth thermal stability, long time-dependent gate dielectric breakdown (TDDB) lifetime and low bias temperature instability (BTI).
利用界面保护技术克服高温过程中蚀刻GaN表面的退化,成功地将高可靠的LPCVD-SiNx栅介电介质与凹栅结构集成在一起,实现了高稳定性和高可靠性的高性能增强模式(Vth ~ +2.37 V @ Id = 100 μA/mm) GaN mis - fet。LPCVD-SiNx/GaN MIS-FET具有高Vth热稳定性、长时间依赖性栅极介电击穿(TDDB)寿命和低偏置温度不稳定性(BTI)等显著优势。