D. Parson, Paul Beatty, C. Glossner, Bryan Schlieder
{"title":"A framework for simulating heterogeneous virtual processors","authors":"D. Parson, Paul Beatty, C. Glossner, Bryan Schlieder","doi":"10.1109/SIMSYM.1999.766455","DOIUrl":null,"url":null,"abstract":"The paper examines the layered software modules of a heterogeneous multiprocessor simulator and debugger, and the design patterns that span these modules. Lucent's LUxWORKS simulator and debugger, works with multiple processor architectures. Its modeling infrastructure, processor models, processor monitor/control, hardware control, vendor simulator interface and Tcl/Tk extension layers are spanned by the following design patterns: (1) build and extend abstract virtual processors; (2) build reflective entities; and (3) build a covariant extensible system. Together these modules and patterns define a processor execution architecture that encourages reuse and dynamic extensibility.","PeriodicalId":104054,"journal":{"name":"Proceedings 32nd Annual Simulation Symposium","volume":"149 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 32nd Annual Simulation Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIMSYM.1999.766455","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
The paper examines the layered software modules of a heterogeneous multiprocessor simulator and debugger, and the design patterns that span these modules. Lucent's LUxWORKS simulator and debugger, works with multiple processor architectures. Its modeling infrastructure, processor models, processor monitor/control, hardware control, vendor simulator interface and Tcl/Tk extension layers are spanned by the following design patterns: (1) build and extend abstract virtual processors; (2) build reflective entities; and (3) build a covariant extensible system. Together these modules and patterns define a processor execution architecture that encourages reuse and dynamic extensibility.