HEADiv: A High-accuracy Energy-efficient Approximate Divider with Error Compensation

Abstract

The circuit complexity of dividers is more considerable than the basic arithmetic units like adders and multipliers. However, the performance of the divider has a significant impact on the system performance, leading to degradation if not appropriately implemented. As a promising design methodology, approximate computing has demonstrated its effectiveness in reducing power consumption and improving performance with good-enough accuracy. This paper proposes an approximate divider HEADiv based on Taylor expansion with error compensation to reduce hardware consumption. The proposed approximate divider is evaluated and analyzed using error and hardware metrics. Compared to other state-of-the-art approximate divider designs, the proposed approximate divider showed 70% and 45% improvement in accuracy for 8-bit and 16-bit dividers, respectively. Besides, the proposed 16-bit approximate divider reduced the area and power consumption by 9% and 42%, respectively. Finally, the experiments illustrate that the proposed approximate divider can improve the PSNR by up to 55% in image processing applications.