Comparison of single and double barrier pseudomorphic doped-channel GaInP/GaInAs/GaAs HFET's: performance and isolation properties

S. McLaughlin, Xiangang Xu, S. Watkins, C. Bolognesi
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Abstract

Doped-channel GaInP/GaInAs/GaAs pseudomorphic heterostructure field-effect transistors (HFETs) were fabricated both with and without a GaInP barrier layer under the GaInAs channel. Two sets of alloy compositions were investigated: Ga/sub 0.85/In/sub 0.15/As channels with Ga/sub 0.51/In/sub 0.49/P barriers, and Ga/sub 0.70/In/sub 0.30/As channels with Ga/sub 0.62/In/sub 0.38/P barriers. For each composition, 1.1 /spl mu/m gate length devices with single and double barrier structures showed similar maximum drain currents (I/sub dmas/), and peak transconductances (g/sub m/), while the double barrier devices showed reduced output conductances (g/sub ds/) compared to the single barrier devices, resulting in a 30-50% larger voltage gain. RF measurements showed a higher maximum frequency of oscillation (f/sub max/) for the double barrier devices of both compositions. For mesa etch isolation of the double barrier devices, it was found to be necessary to remove the bottom GaInP barrier layer to achieve satisfactory device isolation. We speculate that a parasitic 2-dimensional electron gas may be formed at the interface between the bottom GaInP barrier and the GaAs buffer layer.
单势垒和双势垒伪晶掺杂通道GaInP/GaInAs/GaAs HFET的性能和隔离性能比较
制备了掺杂通道GaInP/GaInAs/GaAs伪晶异质场效应晶体管(hfet),在GaInAs通道下分别添加和不添加GaInP势垒层。研究了两组合金成分:Ga/sub 0.85/In/sub 0.15/As通道具有Ga/sub 0.51/In/sub 0.49/P屏障,Ga/sub 0.70/In/sub 0.30/As通道具有Ga/sub 0.62/In/sub 0.38/P屏障。对于每种组成,具有单垒和双垒结构的1.1 /spl mu/m栅极长度器件显示出相似的最大漏极电流(I/sub dmas/)和峰值跨导(g/sub m/),而双垒器件的输出电导(g/sub ds/)比单垒器件低,从而导致30-50%的电压增益。射频测量表明,两种成分的双势垒器件的最大振荡频率(f/sub max/)更高。对于双势垒器件的台面蚀刻隔离,需要去除底部的GaInP势垒层才能获得满意的器件隔离。我们推测,在底部GaInP势垒和GaAs缓冲层之间的界面可能形成寄生的二维电子气体。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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