Fast IP table lookup and memory reduction

2001 IEEE Workshop on High Performance Switching and Routing (IEEE Cat. No.01TH8552) Pub Date : 2001-05-29 DOI:10.1109/HPSR.2001.923637

Y.-C. Liu, C. Lea

引用次数: 4

Abstract

One of the time-consuming tasks in IP4 packet processing is maximum sequence matching. Fast routing requires tens of millions of routing lookups to be performed in one second. This paper describes an implementation of IP table lookup. The implementation is intended as part of the cord of an OC-192 (10 Gbps) and OC-768 (40 Gbps) rate packet processor. One key element is a memory reduction technique that applies to all lookup algorithms. For algorithms with similar complexity as the one described in the paper, the improvement in terms of memory reduction is about 20%-30%.

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快速IP表查找和内存减少

在IP4报文处理中，最大序列匹配是一个非常耗时的任务。快速路由需要在一秒钟内执行数千万次路由查找。本文描述了一个IP表查找的实现。该实现旨在作为OC-192 (10gbps)和OC-768 (40gbps)速率包处理器的一部分。其中一个关键元素是适用于所有查找算法的内存缩减技术。对于与本文相似复杂度的算法，在内存减少方面的改进约为20%-30%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2001 IEEE Workshop on High Performance Switching and Routing (IEEE Cat. No.01TH8552)

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