Characterization of a large scale DNW MAPS fabricated in a 3D integration process

A. Manazza, L. Gaioni, M. Manghisoni, L. Ratti, V. Re, G. Traversi, C. Vacchi
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引用次数: 2

Abstract

This work is concerned with the characterization of a large matrix of deep n-well (DNW) 130 nm CMOS monolithic active pixel sensors (MAPS) with an FPGA based system. The acquisition system has been configured to stimulate the sensor and process the output data of the devices under test. Characterization results provide evidence of a remarkably high yield in the vertical integration process interconnecting the two layers fabricated by Globalfoundries and subsequently processed by Tezzaron Semiconductor.
三维集成工艺中大规模DNW MAPS的表征
本文研究了一种基于FPGA的深n阱(DNW) 130纳米CMOS单片有源像素传感器(MAPS)的大矩阵特性。采集系统已配置为对传感器进行激励并处理被测设备的输出数据。表征结果证明,在垂直集成过程中,由Globalfoundries制造并随后由Tezzaron半导体加工的两层互连具有非常高的成品率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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