{"title":"A RISC-V SoC for Mobile Payment Based on Visible Light Communication","authors":"Xinchao Zhong, Chiu-Wing Sham, Longyu Ma","doi":"10.1109/APCCAS50809.2020.9301688","DOIUrl":null,"url":null,"abstract":"A RISC-V SoC (system on chip) based on visible light communication (VLC) for mobile payment application is presented. The proposed SoC can be applied to Point-of-Sale (POS) terminals to receive mobile payment transaction information sent by the LED flashlight on a smartphone. It consists of a RISC-V subsystem, dedicated analog front end, pulse preprocessing module for VLC signals and other modules. The complete chip is designed on CMOS 0.18µm technology with a chip size of 1.5mm*1.6mm.","PeriodicalId":127075,"journal":{"name":"2020 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS50809.2020.9301688","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
A RISC-V SoC (system on chip) based on visible light communication (VLC) for mobile payment application is presented. The proposed SoC can be applied to Point-of-Sale (POS) terminals to receive mobile payment transaction information sent by the LED flashlight on a smartphone. It consists of a RISC-V subsystem, dedicated analog front end, pulse preprocessing module for VLC signals and other modules. The complete chip is designed on CMOS 0.18µm technology with a chip size of 1.5mm*1.6mm.
提出了一种基于可见光通信(VLC)的RISC-V片上系统(system on chip, SoC)。该SoC可应用于销售点(POS)终端,接收智能手机上LED手电筒发送的移动支付交易信息。它由RISC-V子系统、专用模拟前端、VLC信号脉冲预处理模块等模块组成。完整芯片采用CMOS 0.18µm工艺设计,芯片尺寸为1.5mm*1.6mm。