Implemention Aspects of a SPARC V9 Complete Machine Simulator

Abstract

In this paper we present work in progress in the development of a complete machine simulator for the UltraSPARC, an implementation of the SPARC V9 architecture. The complexity of the UltraSPARC ISA presents many challenges in developing a reliable and yet reasonably efficient implementation of such a simulator. Our implementation includes a heavily object-oriented design for the simulator modules and infrastructure, caching of repeated computations for performance, adding an OS (system call) emulation mode to the simulator and a variety of testing strategies. An ultimate and critical goal in constructing such an artifact is to successfully boot an existing operating system from it; we describe techniques implemented so far, and outline the remaining work and issues, in order to achieve this goal.