A novel ROM-less direct digital frequency synthesizer based on Chebyshev polynomial interpolation

Thirty-Sixth Southeastern Symposium on System Theory, 2004. Proceedings of the Pub Date : 2004-09-27 DOI:10.1109/SSST.2004.1295686

A. Ashrafi, Z. Pan, R. Adhami, B. E. Wells

引用次数: 10

Abstract

In this paper a novel ROM-less direct digital frequency synthesizer (DDFS) is introduced. The phase-to-sine mapping section of this new scheme is designed based on approximation of the first half cycle of a cosine signal by a fourth order Chebyshev polynomial. The spurious free dynamic range (SFDR) of the proposed method is 64.2 dBc while the maximum achievable SFDR is theoretically obtained equal to 66.2 dBc. The proposed method is also implemented using the Xilinx Vertex-II FPGA and the experimental results exhibit the maximum clock frequency around 25 MHz.

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基于切比雪夫多项式插值的新型无rom直接数字频率合成器

介绍了一种新型的无rom直接数字频率合成器(DDFS)。这种新方案的相位到正弦映射部分是基于用四阶切比雪夫多项式逼近余弦信号的前半周期而设计的。该方法的无杂散动态范围(SFDR)为64.2 dBc，理论上可实现的最大SFDR为66.2 dBc。采用Xilinx Vertex-II FPGA实现了该方法，实验结果表明，该方法的最大时钟频率约为25 MHz。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Thirty-Sixth Southeastern Symposium on System Theory, 2004. Proceedings of the

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