Etienne Collard-Fréchette, Georges Kaddoum, G. Gagnon
{"title":"Dynamic range scaling of sigma-delta modulators based on a multi-criteria optimization process","authors":"Etienne Collard-Fréchette, Georges Kaddoum, G. Gagnon","doi":"10.1109/NEWCAS.2011.5981288","DOIUrl":null,"url":null,"abstract":"This paper presents a new coefficient scaling technique to determine the dynamic range of the integrators of sigma delta modulators. This technique relies on numerical optimization of the interstage coefficients to minimize a multi-criteria objective function taking into account the sum of capacitor values implementing the modulator and the voltage swing at each integrator output, for a given target SNR. The optimization process includes the effect of thermal noise at each integrator stage. A user-defined parameter can steer the optimization process priority towards either the size of the capacitors or the integrators output voltage swing, depending on the given application.","PeriodicalId":271676,"journal":{"name":"2011 IEEE 9th International New Circuits and systems conference","volume":"112 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE 9th International New Circuits and systems conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEWCAS.2011.5981288","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents a new coefficient scaling technique to determine the dynamic range of the integrators of sigma delta modulators. This technique relies on numerical optimization of the interstage coefficients to minimize a multi-criteria objective function taking into account the sum of capacitor values implementing the modulator and the voltage swing at each integrator output, for a given target SNR. The optimization process includes the effect of thermal noise at each integrator stage. A user-defined parameter can steer the optimization process priority towards either the size of the capacitors or the integrators output voltage swing, depending on the given application.