An FPGA Implementation of UAV SAR Real-time Imaging Algorithm

Jiaqi Pan, Zhaoyang Zeng, Hui Wang, Wei Hua, Sili Wu
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Abstract

This paper puts forward a valid method to design the Unmanned Aerial Vehicle (UAV) Synthetic Aperture Radar (SAR) real-time imaging processor based on FPGA, a block-wise Phase Gradient Autofocus (PGA)[4],[5] is used to correct the space-variant phase error. The architecture of this processor designs with both fixed point operation and floating point operation to reduce hardware resource, also designs with both pipeline process and parallel process to reduce process time. Experiment results show that system works at 100MHz can process 512MB SAR raw data within about 8 seconds. The good experimental image also proves the validity and reliability of the proposed system.
无人机SAR实时成像算法的FPGA实现
本文提出了一种基于FPGA的无人机合成孔径雷达(SAR)实时成像处理器设计的有效方法,采用分块相位梯度自动对焦(PGA)[4],[5]对空变相位误差进行校正。该处理器采用定点运算和浮点运算相结合的架构设计,以减少硬件资源;采用流水线进程和并行进程相结合的架构设计,以减少处理时间。实验结果表明,系统工作在100MHz时可以在8秒内处理512MB的SAR原始数据。良好的实验图像也证明了该系统的有效性和可靠性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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