{"title":"A 112dB SNDR Delta-Sigma Modulator for Low-Power Audio Applications","authors":"Lvkun Qian, Shengxi Diao","doi":"10.1109/CISP-BMEI53629.2021.9624444","DOIUrl":null,"url":null,"abstract":"This paper presents a discrete-time fourth-order single-bit delta-sigma modulator for audio applications. The modulator is implemented in 0.18 um CMOS technology using fully differential switch-capacitor cascade of integrators feedback (CIFB) architecture. The modulator achieves a 112 dB peak Signal to Noise and Distortion Ratio (SNDR) in 20-kHz signal bandwidth with a sampling frequency of 5.12MHz. The power consumption of the proposed modulator core is 3.9 mW at a supply voltage of 1.8 V.","PeriodicalId":131256,"journal":{"name":"2021 14th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics (CISP-BMEI)","volume":"148 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 14th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics (CISP-BMEI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CISP-BMEI53629.2021.9624444","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents a discrete-time fourth-order single-bit delta-sigma modulator for audio applications. The modulator is implemented in 0.18 um CMOS technology using fully differential switch-capacitor cascade of integrators feedback (CIFB) architecture. The modulator achieves a 112 dB peak Signal to Noise and Distortion Ratio (SNDR) in 20-kHz signal bandwidth with a sampling frequency of 5.12MHz. The power consumption of the proposed modulator core is 3.9 mW at a supply voltage of 1.8 V.