{"title":"Field Programmable Gate Arrays-Based Design of Electrical Power Measurement using Goertzel Algorithm","authors":"F. W. Wibowo, Wihayati","doi":"10.1109/ISMODE56940.2022.10180961","DOIUrl":null,"url":null,"abstract":"Using field programmable gate arrays (FPGAs) as a hardware platform still plays a significant role in digital signal processing. It is because the FPGA has a relatively strong influence on the processing speed and task distribution of its components in parallel. This paper aims to design a hardware-based power meter by applying the Goertzel algorithm, in this case, using an FPGA. The FPGA reconfiguration language used in this design is very high-speed integrated circuit hardware description language (VHDL). The design results that have been synthesized are three top-level modules consisting of an analog capture circuit controller, a DSP module that implements the Goertzel algorithm, and a DAC. The analog capture circuit controller module has three input types and nine output types. While DSP modules have four input types and four output types, and DAC modules have four input types and six output types. The design of this power meter produced an average power factor of 0.96.","PeriodicalId":335247,"journal":{"name":"2022 2nd International Seminar on Machine Learning, Optimization, and Data Science (ISMODE)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 2nd International Seminar on Machine Learning, Optimization, and Data Science (ISMODE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMODE56940.2022.10180961","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Using field programmable gate arrays (FPGAs) as a hardware platform still plays a significant role in digital signal processing. It is because the FPGA has a relatively strong influence on the processing speed and task distribution of its components in parallel. This paper aims to design a hardware-based power meter by applying the Goertzel algorithm, in this case, using an FPGA. The FPGA reconfiguration language used in this design is very high-speed integrated circuit hardware description language (VHDL). The design results that have been synthesized are three top-level modules consisting of an analog capture circuit controller, a DSP module that implements the Goertzel algorithm, and a DAC. The analog capture circuit controller module has three input types and nine output types. While DSP modules have four input types and four output types, and DAC modules have four input types and six output types. The design of this power meter produced an average power factor of 0.96.