{"title":"FGMTL based Low Voltage Current Mode Squarer/Divider Circuit","authors":"Aakriti Chhabra, Bhawna Aggarwal, R. Senani","doi":"10.1109/INDICON52576.2021.9691572","DOIUrl":null,"url":null,"abstract":"A FGMTL (FGMOS Translinear) principle based current mode one quadrant squarer/divider circuit operating at low voltage in saturation region is presented. Squarer/divider is the key circuit which acts as a core building block for nonlinear signal processing functions. Low voltage square/divider can be constructed using FGMTL principle in place of MTL (MOS Translinear) principle in saturation. Multi-input nature of FGMOS transistor reduces the transistor’s threshold voltage which allows low voltage operation of the proposed circuit in saturation region. Proposed circuit is designed at a supply voltage of 0. 7V. It offers a bandwidth of 0. 5GHz when simulated in LTSPICE software using 0.18$\\mu$m CMOS technology. THD of 2.3% to 4.7% is obtained for the sinusoidal peak to peak input current range from 1$\\mu$A to 10$\\mu$A at a frequency of 1KHz.","PeriodicalId":106004,"journal":{"name":"2021 IEEE 18th India Council International Conference (INDICON)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 18th India Council International Conference (INDICON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INDICON52576.2021.9691572","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A FGMTL (FGMOS Translinear) principle based current mode one quadrant squarer/divider circuit operating at low voltage in saturation region is presented. Squarer/divider is the key circuit which acts as a core building block for nonlinear signal processing functions. Low voltage square/divider can be constructed using FGMTL principle in place of MTL (MOS Translinear) principle in saturation. Multi-input nature of FGMOS transistor reduces the transistor’s threshold voltage which allows low voltage operation of the proposed circuit in saturation region. Proposed circuit is designed at a supply voltage of 0. 7V. It offers a bandwidth of 0. 5GHz when simulated in LTSPICE software using 0.18$\mu$m CMOS technology. THD of 2.3% to 4.7% is obtained for the sinusoidal peak to peak input current range from 1$\mu$A to 10$\mu$A at a frequency of 1KHz.