A hardware implementation of gridless routing based on content addressable memory

Abstract

A new gridless router accelerated by content addressable memory (CAM) is presented. A gridless version of the line-expansion algorithm is implemented, which always finds a path if one exists. The router runs in linear time by means of the CAM-based accelerator. Experimental results show that the more obstacles there are in the routing region, the more effective the CAM-based approach is. The CAM-based layout engine provides the flexibility to deal with a variety of geometrical search problems for VLSI design. Another advantage is that complicated coding for sophisticated data structures depending on subproblems is not necessary.<>