Novel simulation of deep-submicron MOSFET circuits

Abstract

The effects of scaling down the MOSFET dimensions to the deep-submicron range lead to operating regions that may be modeled by locally linear equations. The piecewise linear simulator seems to be the obvious choice. Certain requirements must be satisfied by a PL simulator for the successful manipulation of the proposed MOSFET model. Simulation results demonstrate the efficiency in simulating large deep-submicron MOSFET circuits. Several levels of hierarchy can be simulated due to the uniform PL modeling technique.