Asynchronous delta-sigma modulator with multiple-valued output

A. A. Mannan, H. Tamura, K. Tanno
{"title":"Asynchronous delta-sigma modulator with multiple-valued output","authors":"A. A. Mannan, H. Tamura, K. Tanno","doi":"10.1109/ICITEED.2013.6676281","DOIUrl":null,"url":null,"abstract":"In this paper, a continuous-time asynchronous delta-sigma (ΔΣ) modulator (ADSM) is proposed. The proposed circuit is multiple-valued output. The circuit is consists of hysteresis comparator, operational transconductance amplifier, and digital-to-analog circuits. Next, an example circuit of 5-level ADSM is discussed and simulated. An analog-to-digital converter consisted of the 5-level ADMS and multiple-valued logic decoder and digital counter is presented and simulated. All of the proposed circuits are simulated in transistors level through HSPICE with set of 2.0μm CMOS process parameters. Detailed simulation results are shown in this paper.","PeriodicalId":204082,"journal":{"name":"2013 International Conference on Information Technology and Electrical Engineering (ICITEE)","volume":"82 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 International Conference on Information Technology and Electrical Engineering (ICITEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICITEED.2013.6676281","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

In this paper, a continuous-time asynchronous delta-sigma (ΔΣ) modulator (ADSM) is proposed. The proposed circuit is multiple-valued output. The circuit is consists of hysteresis comparator, operational transconductance amplifier, and digital-to-analog circuits. Next, an example circuit of 5-level ADSM is discussed and simulated. An analog-to-digital converter consisted of the 5-level ADMS and multiple-valued logic decoder and digital counter is presented and simulated. All of the proposed circuits are simulated in transistors level through HSPICE with set of 2.0μm CMOS process parameters. Detailed simulation results are shown in this paper.
具有多值输出的异步delta-sigma调制器
本文提出了一种连续时间异步δ - σ (ΔΣ)调制器(ADSM)。所提出的电路是多值输出。该电路由迟滞比较器、运算跨导放大器和数模电路组成。然后,对一个5电平ADSM的示例电路进行了讨论和仿真。提出并仿真了一种由5级ADMS、多值逻辑解码器和数字计数器组成的模数转换器。采用HSPICE对所提出的电路进行了晶体管级的仿真,并设置了2.0μm CMOS工艺参数。文中给出了详细的仿真结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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