{"title":"Experimental characterization of p-channel polysilicon conductivity modulated thin-film transistors","authors":"Chunxiang Zhu, J. Sin, H. Kwok","doi":"10.1109/ASID.1999.762764","DOIUrl":null,"url":null,"abstract":"A p-channel poly-Si CMTFT (Conductivity Modulated Thin-Film Transistor) is demonstrated and experimentally characterized. The transistor uses the concept of conductivity modulation in the offset region to obtain a significant reduction in on-state resistance. This structure can provide 1.5 to 2 orders of magnitude higher on-state current than that of the conventional offset drain TFT at drain voltage ranging from -15 V to -5 V while still maintaining low leakage current and simplicity in device operation. The p-channel CMTFT can be combined with the n-channel CMTFT to form CMOS high voltage drivers, which are very suitable for use in fully integrated large area electronic applications.","PeriodicalId":170859,"journal":{"name":"Proceedings of 5th Asian Symposium on Information Display. ASID '99 (IEEE Cat. No.99EX291)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 5th Asian Symposium on Information Display. ASID '99 (IEEE Cat. No.99EX291)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASID.1999.762764","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A p-channel poly-Si CMTFT (Conductivity Modulated Thin-Film Transistor) is demonstrated and experimentally characterized. The transistor uses the concept of conductivity modulation in the offset region to obtain a significant reduction in on-state resistance. This structure can provide 1.5 to 2 orders of magnitude higher on-state current than that of the conventional offset drain TFT at drain voltage ranging from -15 V to -5 V while still maintaining low leakage current and simplicity in device operation. The p-channel CMTFT can be combined with the n-channel CMTFT to form CMOS high voltage drivers, which are very suitable for use in fully integrated large area electronic applications.