Assertion checkers - enablers of quality design

Abstract

This paper outlines the MBAC tool for the generation of assertion checkers in hardware. We begin with a high-level presentation of the automated compilation of assertions into checkers, and proceed to overview the multitude of applications of resource-efficient circuit-level checkers in the field of logic design and verification. A summary of experimental results is also given to show the current state of the MBAC tool, compared to the best known checker generator from IBM.