{"title":"A Chip Set of LNA, PA, Octupler, Mixer and Transceiver at W band in SiGe BiCMOS Technology for FMCW Applications","authors":"Xu Cheng, Jiangan Han, Xianhu Luo, Liang Zhang, Fengjun Chen","doi":"10.1109/IWS49314.2020.9360021","DOIUrl":null,"url":null,"abstract":"This paper proposes an implementation of a chipset of LNA/PA/Octupler/Mixer and an integrated transceiver chip at W-band using a 0.13 μm SiGe BiCMOS technology. An active biasing scheme is utilized to improve the isolation specification between DC and RF ports and to minimize the power supply pads as well. What is more, a sandwiched slab power combiner topology is brought in to realize a wideband power amplifier. All prototype chips are fabricated in a 0.13 μm SiGe BiCMOS process with a minimum in-band noise figure of 4.8 dB for LNA and an in-band Psat of higher than 17.3 dBm for PA. The -3 dB bandwidth of the PA is larger than 70 GHz while that of LNA/Mixer is larger than 10 GHz. The output -3 dB bandwidth of the octupler is larger than 20 GHz. In addition, the integrated transceiver chip demonstrates a peak Psat of higher than 15 dBm and a mean noise figure of 9 dB with a bandwidth of 10 GHz and a power consumption of 750 mW.","PeriodicalId":301959,"journal":{"name":"2020 IEEE MTT-S International Wireless Symposium (IWS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-09-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE MTT-S International Wireless Symposium (IWS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWS49314.2020.9360021","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper proposes an implementation of a chipset of LNA/PA/Octupler/Mixer and an integrated transceiver chip at W-band using a 0.13 μm SiGe BiCMOS technology. An active biasing scheme is utilized to improve the isolation specification between DC and RF ports and to minimize the power supply pads as well. What is more, a sandwiched slab power combiner topology is brought in to realize a wideband power amplifier. All prototype chips are fabricated in a 0.13 μm SiGe BiCMOS process with a minimum in-band noise figure of 4.8 dB for LNA and an in-band Psat of higher than 17.3 dBm for PA. The -3 dB bandwidth of the PA is larger than 70 GHz while that of LNA/Mixer is larger than 10 GHz. The output -3 dB bandwidth of the octupler is larger than 20 GHz. In addition, the integrated transceiver chip demonstrates a peak Psat of higher than 15 dBm and a mean noise figure of 9 dB with a bandwidth of 10 GHz and a power consumption of 750 mW.