E. Parimalasundar, K. Suresh, R. Sindhuja, K. Manikandan
{"title":"A Performance Investigations of Modular Multilevel Inverter with Reduced Switch Count","authors":"E. Parimalasundar, K. Suresh, R. Sindhuja, K. Manikandan","doi":"10.1109/ICIIET55458.2022.9967595","DOIUrl":null,"url":null,"abstract":"A multilevel inverter is a special variant of converter for dc-ac conversion in medium and high voltage and power requirements. In this paper, a novel configuration with fewer switches needed has been developed for the staircase output voltage levels. Two direct current voltage sources and eight transistors are required to synthesize five levels across the load using the conventional topology. The modular topology has two dc voltage sources, and six switches with a five-level output. Using the optimum multi-carrier pulse width modulation approach, the voltage quality is enhanced and total harmonic distortion is reduced. Furthermore, the viability of the proposed topology in contrast to the conventional cascaded H-bridged multilevel inverter with five levels is established by presenting comparable results showing reduced power losses with varied modulation indexes and increased efficiency. The simulation analysis has been carried out using the MATLAB/SIMULINK tool.","PeriodicalId":341904,"journal":{"name":"2022 International Conference on Intelligent Innovations in Engineering and Technology (ICIIET)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 International Conference on Intelligent Innovations in Engineering and Technology (ICIIET)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIIET55458.2022.9967595","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
A multilevel inverter is a special variant of converter for dc-ac conversion in medium and high voltage and power requirements. In this paper, a novel configuration with fewer switches needed has been developed for the staircase output voltage levels. Two direct current voltage sources and eight transistors are required to synthesize five levels across the load using the conventional topology. The modular topology has two dc voltage sources, and six switches with a five-level output. Using the optimum multi-carrier pulse width modulation approach, the voltage quality is enhanced and total harmonic distortion is reduced. Furthermore, the viability of the proposed topology in contrast to the conventional cascaded H-bridged multilevel inverter with five levels is established by presenting comparable results showing reduced power losses with varied modulation indexes and increased efficiency. The simulation analysis has been carried out using the MATLAB/SIMULINK tool.