A study on linearity vs. LTE signal bandwidth and supply voltage for high-efficiency SiGe power amplifier design with CW load-pull

J. Tsay, Juan José Vaquero López, J. Mayeda, T. Hall, B. T. Nukala, D. Lie
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引用次数: 1

Abstract

This paper shows a highly-efficient SiGe power amplifier (PA) design where its linearity, power-added efficiency (PAE) and POUT are studied vs. different LTE 16QAM signal BW and supply voltage. The monolithic PA, designed in 0.35-μm SiGe BiCMOS technology with through-silicon via (TSV) using continuous wave (CW) load-pull, passes the stringent LTE spectrum emission mask (SEM) at average linear POUT = 23.5/23.1/23.1 dBm with 48.0/45.2/45.0% PAE for LTE 5/10/20 MHz inputs. The adjacent channel leakage ratios ACLR1/ACLR2 exhibit opposite trends vs. increasing signal BW at POUT below compression (P1dB = 22.3 dBm), while past compression ACLR1/ACLR2 increase with larger BW, with some ACLR2 asymmetry at 10/20 MHz. Lowering the supply voltage has a larger effect on ACLR degradation than higher signal BW. The data suggests that static CW load-pull data is useful for PA design even for 16QAM modulated signal but cannot accurately predict SiGe PA's linearity performance.
线性度与LTE信号带宽和电源电压的关系研究,用于连续波负载-拉力的高效率SiGe功率放大器设计
本文展示了一种高效的SiGe功率放大器(PA)设计,在不同的LTE 16QAM信号BW和电源电压下,研究了其线性度,功率附加效率(PAE)和POUT。该单片PA采用0.35 μm SiGe BiCMOS技术,采用连续波(CW)负载-拉扯,通过了严格的LTE频谱发射掩模(SEM),平均线性POUT = 23.5/23.1/23.1 dBm, PAE为48.0/45.2/45.0%,适用于LTE 5/10/20 MHz输入。相邻信道泄漏比ACLR1/ACLR2表现出相反的趋势,在POUT低于压缩(P1dB = 22.3 dBm)时信号BW增加,而过去压缩时ACLR1/ACLR2随BW增大而增加,在10/20 MHz时ACLR2有一定的不对称性。降低电源电压对ACLR退化的影响要大于提高信号BW。数据表明,静态连续波负载-拉力数据即使对16QAM调制信号也是有用的,但不能准确预测SiGe放大器的线性性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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