SOI pixel detector based on CMOS time-compression charge-injection

D. Durini, W. Brockherde, B. Hosticka
{"title":"SOI pixel detector based on CMOS time-compression charge-injection","authors":"D. Durini, W. Brockherde, B. Hosticka","doi":"10.1109/ECCTD.2007.4529754","DOIUrl":null,"url":null,"abstract":"Concept and experimental results obtained from a pixel detector based on CMOS time-compression charge- injection-devices (TC-CID) with a huge internal photocurrent amplification (-104), fabricated in CMOS silicon-on-insulator (SOI) technology are presented. Here, the readout circuitry is fabricated on highly-doped, 200 nm thick SOI film, while the photogate (PG) detector is fabricated on higher-resistivity handle wafer. The latter, together with the 30 V biasing possibilities enhances the quantum efficiency, especially for irradiations with wavelengths in the near-infra-red (NIR) part of the spectra.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"113 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 18th European Conference on Circuit Theory and Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCTD.2007.4529754","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

Concept and experimental results obtained from a pixel detector based on CMOS time-compression charge- injection-devices (TC-CID) with a huge internal photocurrent amplification (-104), fabricated in CMOS silicon-on-insulator (SOI) technology are presented. Here, the readout circuitry is fabricated on highly-doped, 200 nm thick SOI film, while the photogate (PG) detector is fabricated on higher-resistivity handle wafer. The latter, together with the 30 V biasing possibilities enhances the quantum efficiency, especially for irradiations with wavelengths in the near-infra-red (NIR) part of the spectra.
基于CMOS时间压缩电荷注入的SOI像素探测器
介绍了一种基于CMOS时间压缩电荷注入器件(TC-CID)的像素探测器的概念和实验结果,该器件具有巨大的内部光电流放大(-104),采用CMOS绝缘体上硅(SOI)技术制造。读出电路制作在高掺杂200 nm厚的SOI薄膜上,而光门探测器制作在高电阻率的手柄晶片上。后者与30 V偏置可能性一起提高了量子效率,特别是对于光谱中波长在近红外(NIR)部分的辐照。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信