A high gain, low voltage folded-switching mixer with current-reuse in 0.18 /spl mu/m CMOS

Abstract

The scaling of CMOS technologies has a great impact on analog design. The most severe consequence is a reduction of the voltage supply. In this article, a new low voltage folded-switching mixer with current reuse, which operates at 1 V supply voltage, is discussed. The main advantages of the introduced mixer topology are: a high voltage gain, a moderate noise figure and an operation at low supply voltages. Full insight into mixer operation is given by analyzing voltage gain, noise figure, linearity (IIP3) and DC stability. The mixer is designed and implemented in 0.18 /spl mu/m CMOS technology with MIM capacitors as an option. The active chip area is 160 /spl mu/m/spl times/200 /spl mu/m. At 2.4 GHz, a single side band (SSB) noise figure of 13.9 dB, a voltage gain of 11.9 dB and IIP3 of -3 dBm are measured at a supply voltage of 1 V and with a power consumption of 3.2 mW.