{"title":"Mapping reusable software components onto the ARC parallel processor","authors":"L. Welch, B. Weide","doi":"10.1109/FMPC.1990.89502","DOIUrl":null,"url":null,"abstract":"It is shown how to map the components of a program onto the ARC (Architecture for Reusable Components) processor automatically in a way that exploits its features. Mapping consists of two phases. The first phase determines the maximum amount of parallelism attainable from a program in the model of parallel execution. This is done by mapping program components onto logical processors (of which there are an infinite number). The second phase maps the contents of the logical processors onto physical processors (of which there are a limited number). It is shown to (1) identify the distributable components, of the system, (2) determine the relevant relationships among the components, (3) model the maximum amount of parallelism attainable with the model of parallel execution used, and (4) use the information from steps 1-3 to map components onto the processor nodes of ARC. Previous related work is reviewed.<<ETX>>","PeriodicalId":193332,"journal":{"name":"[1990 Proceedings] The Third Symposium on the Frontiers of Massively Parallel Computation","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1990 Proceedings] The Third Symposium on the Frontiers of Massively Parallel Computation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FMPC.1990.89502","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
It is shown how to map the components of a program onto the ARC (Architecture for Reusable Components) processor automatically in a way that exploits its features. Mapping consists of two phases. The first phase determines the maximum amount of parallelism attainable from a program in the model of parallel execution. This is done by mapping program components onto logical processors (of which there are an infinite number). The second phase maps the contents of the logical processors onto physical processors (of which there are a limited number). It is shown to (1) identify the distributable components, of the system, (2) determine the relevant relationships among the components, (3) model the maximum amount of parallelism attainable with the model of parallel execution used, and (4) use the information from steps 1-3 to map components onto the processor nodes of ARC. Previous related work is reviewed.<>