Mapping reusable software components onto the ARC parallel processor

L. Welch, B. Weide
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引用次数: 1

Abstract

It is shown how to map the components of a program onto the ARC (Architecture for Reusable Components) processor automatically in a way that exploits its features. Mapping consists of two phases. The first phase determines the maximum amount of parallelism attainable from a program in the model of parallel execution. This is done by mapping program components onto logical processors (of which there are an infinite number). The second phase maps the contents of the logical processors onto physical processors (of which there are a limited number). It is shown to (1) identify the distributable components, of the system, (2) determine the relevant relationships among the components, (3) model the maximum amount of parallelism attainable with the model of parallel execution used, and (4) use the information from steps 1-3 to map components onto the processor nodes of ARC. Previous related work is reviewed.<>
将可重用的软件组件映射到ARC并行处理器上
它展示了如何以一种利用其特性的方式将程序的组件自动映射到ARC(可重用组件体系结构)处理器上。映射包括两个阶段。第一阶段确定在并行执行模型中程序可获得的最大并行性。这是通过将程序组件映射到逻辑处理器(逻辑处理器的数量是无限的)来完成的。第二阶段将逻辑处理器的内容映射到物理处理器(物理处理器的数量有限)。它显示了(1)识别系统的可分布组件,(2)确定组件之间的相关关系,(3)用所使用的并行执行模型对可实现的最大并行量进行建模,以及(4)使用步骤1-3的信息将组件映射到ARC的处理器节点。回顾以往的相关工作。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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