Benchmarking of low band gap III-V based-HEMTs and sub-100nm CMOS under low drain voltage regime

Abstract

this works reports on speed and high performance benchmarking of low band gap III-V based-HEMTs versus advanced n-MOSFET in low drain voltage regime (few kT/q). In this low bias condition, figure of merits such as, fT are higher and intrinsic gate delay and energy are almost one order of magnitude lower in the case of III-V based-devices (two orders of magnitude for the delay-energy product).