An improved design of digital calibration arithmetic applied in pipeline ADC

Abstract

Digital calibration arithmetic becomes more and more widely applied in pipeline ADC with high precision, the structure of pipeline ADC based on digital calibration is commonly 1.5bit/stage presently. 2bit/stage, the structure of which has strong superiority in power consumption and chip size, is adopted in this paper after analyzing the advantages and disadvantages of different kinds of structures. An improved digital calibration arithmetic is designed, which has solved the problem of accuracy of calibrating coefficients in present arithmetic and made the calibrated output data more accurate. The result indicates that the improved digital calibration arithmetic makes the system linearity get highly upgraded.