Research on the implementation of trusted platform module based on reconfigurable computing

Zhichao Liu, Yunfeng Wang, Tianxiang Liu
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引用次数: 1

Abstract

In this paper, the implementation and reconfigurable feature of RSA and AES cryptographic algorithm are analyzed. On the basis of the Reconfigurable design of this two algorithms, Reconfigurable RSA and AES hardware architecture is designed to fit four different key length of 256bit, 512bit, 1024bit, 2048bit for RSA, and three different key length of 128bit, 192bit, and 256bit for AES. The reconfigurable design and testing are carried out on FPGA, the results showed that it is able to meet the high-performance information security systems encryption algorithm on the speed requirement.
基于可重构计算的可信平台模块实现研究
本文分析了RSA和AES加密算法的实现及其可重构特性。在对这两种算法进行可重构设计的基础上,设计了可重构RSA和AES的硬件架构,以适应RSA 256bit、512bit、1024bit、2048bit四种不同的密钥长度,以及AES 128bit、192bit、256bit三种不同的密钥长度。在FPGA上进行了可重构设计和测试,结果表明该算法能够满足高性能信息安全系统对加密算法的速度要求。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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