Implementation of an AES-based real-time Video Encryption/Decryption using FPGA/HPS

Abstract

Data communication security is a vital aspect of our daily life especially with the current shift to online alternative ways due to the pandemic. One of these ways is online video meetings. The aim of this work is not only to implement the AES-128 algorithm but to maximize its performance while using it in a video recording encryption/decryption application within the low-cost constrained embedded hardware of the Terasic DE10 Standard FPGA Board. First, the AES-128 algorithm was implemented in C for comparison purposes, and then multiple designs of a HPS-based system that make use of the SoC HPS and FPGA were evaluated. Finally, we implemented the fastest designs in a real-time video encryption/decryption application. The results showed that the system has the advantage of faster execution by a factor of over 4 times when compared to the software implementation.