S. Rajendra Prasad, Namani Kavya Sree, Kondra Omkumar, Kothapalli Srujana
{"title":"An Efficient and Low Power 45nm CMOS Based R-2R DAC","authors":"S. Rajendra Prasad, Namani Kavya Sree, Kondra Omkumar, Kothapalli Srujana","doi":"10.1109/INCET57972.2023.10170648","DOIUrl":null,"url":null,"abstract":"The main purpose of the Digital to Analog converter (DAC) is to act as an interface between the digital device and the analog device. Which converts the binary digital values(0,1) into a series of analog voltages. Each type of DAC has its own set of advantages and disadvantages, It is not possible to attain all positive aspects in one circuit. By considering different parameters like power, resolution etc., we have designed a 4-bit CMOS based R-2R DAC in 45nm technology. In this paper, we are using two stage operational amplifier(opamp) in order to enhance the performance of the R-2R DAC. A differential amplifier stage and a gain stage form the two stage opamp, and two values of resistors R and 2R are invoked to form the R-2R ladder network. This two stage opamp and 4-bit R-2R ladder network are used together to design a 4-bit R-2R DAC. Then This DAC is simulated using the Synopsys H-spice tool and based on the simulation results, analysis is performed by considering various parameters like accuracy-Integral nonlinearity (INL) and Differential nonlinearity(DNL) errors, resolution, average, static, and dynamic powers, and settling time. The proposed R-2R DAC has low power and less INL, and DNL errors which are efficient when compared with the related work.","PeriodicalId":403008,"journal":{"name":"2023 4th International Conference for Emerging Technology (INCET)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 4th International Conference for Emerging Technology (INCET)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INCET57972.2023.10170648","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The main purpose of the Digital to Analog converter (DAC) is to act as an interface between the digital device and the analog device. Which converts the binary digital values(0,1) into a series of analog voltages. Each type of DAC has its own set of advantages and disadvantages, It is not possible to attain all positive aspects in one circuit. By considering different parameters like power, resolution etc., we have designed a 4-bit CMOS based R-2R DAC in 45nm technology. In this paper, we are using two stage operational amplifier(opamp) in order to enhance the performance of the R-2R DAC. A differential amplifier stage and a gain stage form the two stage opamp, and two values of resistors R and 2R are invoked to form the R-2R ladder network. This two stage opamp and 4-bit R-2R ladder network are used together to design a 4-bit R-2R DAC. Then This DAC is simulated using the Synopsys H-spice tool and based on the simulation results, analysis is performed by considering various parameters like accuracy-Integral nonlinearity (INL) and Differential nonlinearity(DNL) errors, resolution, average, static, and dynamic powers, and settling time. The proposed R-2R DAC has low power and less INL, and DNL errors which are efficient when compared with the related work.