Layout Strategies for Connecting Multiple Superconducting Ground Planes with Ground Pillars

Abstract

Several advances have been made towards increasing the number of Niobium layers for superconductor integrated circuits. Fabrication processes, such as the MIT Lincoln Laboratory SFQ5ee process and the CRAVITY-AIST process, now provide eight or more Niobium layers. The additional superconducting layers significantly increase the space available for routing between and within cells. However, striplines must now be routed through multiple ground planes to efficiently utilize all available metal layers. This can lead to large mutual inductance between signal lines, especially when ground pillars are used to connect ground planes. The placement of these ground pillars become crucial. In this work, we use numerical software to analyze the effects of striplines transitioning through multiple ground planes and how the location of ground pillars influence the mutual inductance between lines and show that careful layout considerations are required for modern circuits with dense layouts. We also present layout improvement strategies to mitigate or lessen the negative effects of these mutual inductance on circuit operation.