4 channel signal based FPGA architecture for myolectric features extraction by H.O.S.

Abstract

In this paper, an FPGA-based parallel architecture for the computation of myoelectric signal feature extraction, employing higher order statistics in presented. The three channels myoelectric signal is obtained directly from the user's muscles, in order to obtain prosthesis movement commands which emulate a biological elbow. The proposed architecture was realized in Very High Speed Integrated Circuit (BHSIC) by Hardware Description Language (VHDL), and functionally verified on a Xilinx board, which uses a Spartan-3 XC3S700AN FG48-4 FPGA. Experimental results are presented, and establish a maximum operation frequency of 44.570MHz.