Performance Analysis of the Analog Path of Read-Out Integrated Circuit for MEMS structures under Temperature Variation

Abstract

The paper presents a time-analysis of capacitive analog readout circuit properties for a range of operating temperatures. Comparison of schematic-based and post-layout extraction-based behavior is conducted, and the analysis includes and compares simulation and measurement results. The presented analysis identifies the temperature-relation of the circuit readout values as well as shows the influence of environment temperature on noise levels.