{"title":"A 0.1-5.7 GHz CMOS Phase Shifter with 0.27dB/1.8° RMS Magnitude /Phase Errors and Enhanced Linearity","authors":"J. Xia, Yiling Xu, Hai Huang, S. Boumaiza","doi":"10.1109/SIRF.2019.8709089","DOIUrl":null,"url":null,"abstract":"This paper describes a new broadband vector modulator phase shifter (VMPS) featuring low magnitude/phase errors and enhanced linearity. It includes a novel variable gain amplifier (VGA) that is devised to mitigate two issues that are detrimental to the overall performance of the VMPS, namely, the variation of the phase with gain setting and large-signal nonlinearity. This is achieved by incorporating a modified tail current source that is carefully designed to perform a square-law function and compensate for the nonlinearity associated with the source-coupled pair of amplifiers. A proof-of-concept prototype of the proposed VGA, an input active balun stage and a post-amplifier stage were then designed using bulk 130 nm CMOS process to form an VMPS that operates in the sub-6GHz band. The fabricated VMPS chip confirmed magnitude and phase control ranges of 35 dB and 360 degrees, respectively. Without any baseband calibration, it maintained low root-mean-square (RMS) magnitude and phase errors within 0.27 dB and 1.8 degree, respectively, over the entire band of 0.1-5.7 GHz. Furthermore, a relatively high input 1-dB compression point of 4.5-6.8 dBm was achieved in the target bandwidth.","PeriodicalId":356507,"journal":{"name":"2019 IEEE 19th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 19th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIRF.2019.8709089","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper describes a new broadband vector modulator phase shifter (VMPS) featuring low magnitude/phase errors and enhanced linearity. It includes a novel variable gain amplifier (VGA) that is devised to mitigate two issues that are detrimental to the overall performance of the VMPS, namely, the variation of the phase with gain setting and large-signal nonlinearity. This is achieved by incorporating a modified tail current source that is carefully designed to perform a square-law function and compensate for the nonlinearity associated with the source-coupled pair of amplifiers. A proof-of-concept prototype of the proposed VGA, an input active balun stage and a post-amplifier stage were then designed using bulk 130 nm CMOS process to form an VMPS that operates in the sub-6GHz band. The fabricated VMPS chip confirmed magnitude and phase control ranges of 35 dB and 360 degrees, respectively. Without any baseband calibration, it maintained low root-mean-square (RMS) magnitude and phase errors within 0.27 dB and 1.8 degree, respectively, over the entire band of 0.1-5.7 GHz. Furthermore, a relatively high input 1-dB compression point of 4.5-6.8 dBm was achieved in the target bandwidth.