Jinmei Shi, Jie Chen, P. Ye, Jun-liang Feng, Yongzhong Liang
{"title":"Research and Analysis on Performance Improvement of Transmission Delay Caused by BTI Aging","authors":"Jinmei Shi, Jie Chen, P. Ye, Jun-liang Feng, Yongzhong Liang","doi":"10.1145/3487075.3487121","DOIUrl":null,"url":null,"abstract":"In the field of the transmission delay of input buffer, the problem of delay caused by BTI (Bias Temperature Instability) aging is very concerned about to researchers. With the addition of a new generation of process design, the research of BTI has become the most critical mechanism. This paper mainly discusses the important breakthrough obtained by establishing aging model and standard logic unit after accurate estimation and comprehensive analysis. A typical example in this paper is using LTSPICE software to simulate and design in 32 nm CMOS process. Through the simulation results, it can be concluded that the transmission delay of Schmitt flip-flops which is input buffer in this design is significantly improved. Although affected by BTI aging, the transmission delay of 11 cascaded CMOS inverters is increased by about 30% and the delay is reduced by above half compared to before. The need of increasing reliability is optimized by combining with ALI and AHI technology, which reduces the transmission delay by about 35%.","PeriodicalId":354966,"journal":{"name":"Proceedings of the 5th International Conference on Computer Science and Application Engineering","volume":"145 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 5th International Conference on Computer Science and Application Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3487075.3487121","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In the field of the transmission delay of input buffer, the problem of delay caused by BTI (Bias Temperature Instability) aging is very concerned about to researchers. With the addition of a new generation of process design, the research of BTI has become the most critical mechanism. This paper mainly discusses the important breakthrough obtained by establishing aging model and standard logic unit after accurate estimation and comprehensive analysis. A typical example in this paper is using LTSPICE software to simulate and design in 32 nm CMOS process. Through the simulation results, it can be concluded that the transmission delay of Schmitt flip-flops which is input buffer in this design is significantly improved. Although affected by BTI aging, the transmission delay of 11 cascaded CMOS inverters is increased by about 30% and the delay is reduced by above half compared to before. The need of increasing reliability is optimized by combining with ALI and AHI technology, which reduces the transmission delay by about 35%.
在输入缓冲器的传输延迟领域中,BTI (Bias Temperature Instability,偏置温度不稳定性)老化引起的延迟问题一直是研究人员非常关注的问题。随着新一代工艺设计的加入,BTI的研究已成为最关键的机制。本文主要讨论了经过准确估计和综合分析,建立老化模型和标准逻辑单元所取得的重要突破。本文的一个典型例子是利用LTSPICE软件在32nm CMOS工艺上进行仿真和设计。通过仿真结果可以看出,该设计显著提高了作为输入缓冲器的施密特触发器的传输延迟。虽然受到BTI老化的影响,但11级联CMOS逆变器的传输延迟比以前增加了约30%,延迟减少了一半以上。结合ALI和AHI技术优化了提高可靠性的需求,使传输延迟降低了35%左右。