Research and Analysis on Performance Improvement of Transmission Delay Caused by BTI Aging

Abstract

In the field of the transmission delay of input buffer, the problem of delay caused by BTI (Bias Temperature Instability) aging is very concerned about to researchers. With the addition of a new generation of process design, the research of BTI has become the most critical mechanism. This paper mainly discusses the important breakthrough obtained by establishing aging model and standard logic unit after accurate estimation and comprehensive analysis. A typical example in this paper is using LTSPICE software to simulate and design in 32 nm CMOS process. Through the simulation results, it can be concluded that the transmission delay of Schmitt flip-flops which is input buffer in this design is significantly improved. Although affected by BTI aging, the transmission delay of 11 cascaded CMOS inverters is increased by about 30% and the delay is reduced by above half compared to before. The need of increasing reliability is optimized by combining with ALI and AHI technology, which reduces the transmission delay by about 35%.