L. H. Bonani, F. R. Barbosa, Rangel Arthur, E. Moschim
{"title":"Analysis of electronic buffers in optical packet/burst switched mesh networks","authors":"L. H. Bonani, F. R. Barbosa, Rangel Arthur, E. Moschim","doi":"10.1109/ICTON.2008.4598676","DOIUrl":null,"url":null,"abstract":"We present in this paper the study of electronic buffering in an innovative architecture for optical packet/burst switched network (OPSN). This architecture comprises optical bufferless nodes with electronic packet queuing out of the optical layer, deflection routing to perform contention resolution and fully connected mesh topologies under uniform traffic distribution. We demonstrate, by means of simulation, that the studied architecture has a great improvement in performance when we introduce such electronic buffers, which are more efficient when used with the optimized mesh topologies.","PeriodicalId":230802,"journal":{"name":"2008 10th Anniversary International Conference on Transparent Optical Networks","volume":"198 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 10th Anniversary International Conference on Transparent Optical Networks","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICTON.2008.4598676","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
We present in this paper the study of electronic buffering in an innovative architecture for optical packet/burst switched network (OPSN). This architecture comprises optical bufferless nodes with electronic packet queuing out of the optical layer, deflection routing to perform contention resolution and fully connected mesh topologies under uniform traffic distribution. We demonstrate, by means of simulation, that the studied architecture has a great improvement in performance when we introduce such electronic buffers, which are more efficient when used with the optimized mesh topologies.