Y. Akatsuka, Y. Nagahashi, I. Sasaki, K. Eguchi, N. Hotta
{"title":"Fully Static CMOS 16k RAM using Dynamic Circuitry Technique","authors":"Y. Akatsuka, Y. Nagahashi, I. Sasaki, K. Eguchi, N. Hotta","doi":"10.1109/ESSCIRC.1980.5468762","DOIUrl":null,"url":null,"abstract":"A fully static CMOS 16k RAM with fast access time of 87ns and very low power dissipation of 79mW for 200ns cycle time has been realized using dynamic circuitry technique.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 80: 6th European Solid State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1980.5468762","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
A fully static CMOS 16k RAM with fast access time of 87ns and very low power dissipation of 79mW for 200ns cycle time has been realized using dynamic circuitry technique.