SystemsAndrew P. Worthen, Sangjin Hong, Riten Gupta, Wayne E. StarkDepartment
{"title":"Performance optimization of VLSI transceivers for low-energy communications systems","authors":"SystemsAndrew P. Worthen, Sangjin Hong, Riten Gupta, Wayne E. StarkDepartment","doi":"10.1109/MILCOM.1999.821440","DOIUrl":null,"url":null,"abstract":"Design of low-energy communications systems requires attention to power consumption in the overall system design and the algorithm implementations. We consider design of a communications system incorporating digital transmission and receiver filters, and error-control coding. Various well-known channel codes including turbo codes, block codes, and convolutional codes are studied. For each of these decoders, its decoding performance and power consumption are evaluated from VLSI chip designs. We then demonstrate optimization of a simple design from a total system perspective.","PeriodicalId":334957,"journal":{"name":"MILCOM 1999. IEEE Military Communications. Conference Proceedings (Cat. No.99CH36341)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"MILCOM 1999. IEEE Military Communications. Conference Proceedings (Cat. No.99CH36341)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MILCOM.1999.821440","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
Design of low-energy communications systems requires attention to power consumption in the overall system design and the algorithm implementations. We consider design of a communications system incorporating digital transmission and receiver filters, and error-control coding. Various well-known channel codes including turbo codes, block codes, and convolutional codes are studied. For each of these decoders, its decoding performance and power consumption are evaluated from VLSI chip designs. We then demonstrate optimization of a simple design from a total system perspective.