Architecture and implementation of a distributed reconfigurable metacomputer

Abstract

The use of application-specific co-processors created using reconfigurable hardware (FPGAs) has been shown to realize significant speed increases for many computationally intensive applications. The addition of reconfigurable hardware to clusters composed of commodity machines in order to improve the execution times of parallel applications would, therefore, appear to be a logical step. However, the extra complications introduced by this technique may make the real-world application of such technology appear to be prohibitively difficult. In this paper the design and implementation of a metacomputer designed to simplify the development of applications for clusters containing re-configurable hardware are presented. The operation of the metacomputer is also discussed in some detail, including the process of implementing applications for execution on the metacomputer.