{"title":"A low power high linearity CMOS folded mixer for WiMAX application","authors":"C. Hsiao, Yi-Lun Huang","doi":"10.1109/SMELEC.2010.5549390","DOIUrl":null,"url":null,"abstract":"A low power high linearity folded mixer for 3.6 GHz WiMAX application is presented in this paper. The circuit was designed with TSMC 0.18µm CMOS process. An RF PMOS is used to improve the linearity. The proposed folded mixer has the conversion gain of 4.4dB with LO power at −5dBm. The IIP3 is 5.5dBm, noise figure is 11.6dB, and the power consumption is 2.636mW without output buffer. The total power consumption with output buffer is only 4.4mW under a 1V supply voltage.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMELEC.2010.5549390","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A low power high linearity folded mixer for 3.6 GHz WiMAX application is presented in this paper. The circuit was designed with TSMC 0.18µm CMOS process. An RF PMOS is used to improve the linearity. The proposed folded mixer has the conversion gain of 4.4dB with LO power at −5dBm. The IIP3 is 5.5dBm, noise figure is 11.6dB, and the power consumption is 2.636mW without output buffer. The total power consumption with output buffer is only 4.4mW under a 1V supply voltage.