An In-memory Booth Multiplier Based on Non-volatile Memory for Neural Network Applications

Jiayao Wu, Yijiao Wang, Zhi Yang, Kuiqing He, Pengxu Wang, Weisheng Zhao
{"title":"An In-memory Booth Multiplier Based on Non-volatile Memory for Neural Network Applications","authors":"Jiayao Wu, Yijiao Wang, Zhi Yang, Kuiqing He, Pengxu Wang, Weisheng Zhao","doi":"10.1145/3565478.3572534","DOIUrl":null,"url":null,"abstract":"Neural network (NN) is one of the most significant methods to accomplish complex targets, which is widely used in image recognition, natural language processing and so on. NN demands tremendous amount of parallel Multiply-and-accumulation (MAC) operations that would affect the speed and power efficiency. Thus, how to accelerate MAC and reduce the power consumption, especially for multiplication, is a critical concern. Perpendicular-anisotropy spin-orbit torque (SOT) magnetic random access memory (MRAM) with spin transfer torque (STT) assisted is leveraged in this work, which is perfect to be used for NN because of its non-volatility, power efficiency and ultrafast operation. In addition, Booth arithmetic is an excellent method to reduce the partial products of the multiplication for acceleration. In this work, an in-memory Booth multiplier based on MRAM is designed and analyzed through simulation. Compared with the in-SRAM counterpart, our design saved 70.4% energy of the decoding part, which shows great improvement.","PeriodicalId":125590,"journal":{"name":"Proceedings of the 17th ACM International Symposium on Nanoscale Architectures","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 17th ACM International Symposium on Nanoscale Architectures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3565478.3572534","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

Neural network (NN) is one of the most significant methods to accomplish complex targets, which is widely used in image recognition, natural language processing and so on. NN demands tremendous amount of parallel Multiply-and-accumulation (MAC) operations that would affect the speed and power efficiency. Thus, how to accelerate MAC and reduce the power consumption, especially for multiplication, is a critical concern. Perpendicular-anisotropy spin-orbit torque (SOT) magnetic random access memory (MRAM) with spin transfer torque (STT) assisted is leveraged in this work, which is perfect to be used for NN because of its non-volatility, power efficiency and ultrafast operation. In addition, Booth arithmetic is an excellent method to reduce the partial products of the multiplication for acceleration. In this work, an in-memory Booth multiplier based on MRAM is designed and analyzed through simulation. Compared with the in-SRAM counterpart, our design saved 70.4% energy of the decoding part, which shows great improvement.
一种基于非易失性存储器的神经网络应用内存倍增器
神经网络是实现复杂目标的重要方法之一,广泛应用于图像识别、自然语言处理等领域。神经网络需要大量的并行乘法和累积(MAC)操作,这将影响速度和功率效率。因此,如何加速MAC并降低功耗,特别是对于乘法,是一个关键问题。利用垂直各向异性自旋-轨道转矩(SOT)磁随机存储器(MRAM)辅助自旋转移转矩(STT),该存储器具有非易失性、功率效率高、运行速度快等优点,非常适合应用于神经网络。此外,布斯算法是一个很好的方法,以减少部分乘积的乘法加速度。本文设计了一种基于MRAM的内存布斯乘法器,并进行了仿真分析。与sram芯片相比,我们的设计在解码部分节省了70.4%的能量,有很大的改进。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信