{"title":"An In-memory Booth Multiplier Based on Non-volatile Memory for Neural Network Applications","authors":"Jiayao Wu, Yijiao Wang, Zhi Yang, Kuiqing He, Pengxu Wang, Weisheng Zhao","doi":"10.1145/3565478.3572534","DOIUrl":null,"url":null,"abstract":"Neural network (NN) is one of the most significant methods to accomplish complex targets, which is widely used in image recognition, natural language processing and so on. NN demands tremendous amount of parallel Multiply-and-accumulation (MAC) operations that would affect the speed and power efficiency. Thus, how to accelerate MAC and reduce the power consumption, especially for multiplication, is a critical concern. Perpendicular-anisotropy spin-orbit torque (SOT) magnetic random access memory (MRAM) with spin transfer torque (STT) assisted is leveraged in this work, which is perfect to be used for NN because of its non-volatility, power efficiency and ultrafast operation. In addition, Booth arithmetic is an excellent method to reduce the partial products of the multiplication for acceleration. In this work, an in-memory Booth multiplier based on MRAM is designed and analyzed through simulation. Compared with the in-SRAM counterpart, our design saved 70.4% energy of the decoding part, which shows great improvement.","PeriodicalId":125590,"journal":{"name":"Proceedings of the 17th ACM International Symposium on Nanoscale Architectures","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 17th ACM International Symposium on Nanoscale Architectures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3565478.3572534","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Neural network (NN) is one of the most significant methods to accomplish complex targets, which is widely used in image recognition, natural language processing and so on. NN demands tremendous amount of parallel Multiply-and-accumulation (MAC) operations that would affect the speed and power efficiency. Thus, how to accelerate MAC and reduce the power consumption, especially for multiplication, is a critical concern. Perpendicular-anisotropy spin-orbit torque (SOT) magnetic random access memory (MRAM) with spin transfer torque (STT) assisted is leveraged in this work, which is perfect to be used for NN because of its non-volatility, power efficiency and ultrafast operation. In addition, Booth arithmetic is an excellent method to reduce the partial products of the multiplication for acceleration. In this work, an in-memory Booth multiplier based on MRAM is designed and analyzed through simulation. Compared with the in-SRAM counterpart, our design saved 70.4% energy of the decoding part, which shows great improvement.