Design, Optimization and Realization of Two Compact C-band Microstrip BPF Structures

Amjad Altaf, C. Xi, J. Miao
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引用次数: 1

Abstract

In last two decades, several microstrip BPF topologies have been investigated to meet more than 100% fractional bandwidth requirement of Ultra-Wideband (UWB) systems with pass-band from 3.1-10.6 GHz. This paper presents two compact C-band microstrip BPF structures inspired from design techniques of UWB BPF. These C-band BPF are designed for center frequency f0 of 6 GHz and fractional bandwidth around 67% covering complete C-band (4-8 GHz). The first proposed BPF is realized by using a combination of step impedance low pass filter (LPF) and the optimum distributed short-circuited stubs high pass filter (HPF). The second filter is designed using pseudo-interdigital stepped impedance resonators (PIDT-SIRS. Both filters have been implemented on commercial printed circuit board (PCB) of RO4350B substrate and each occupy an area less than 20 mil × 10 mil. These filters require minimum pass band variation so that they can be integrated with a gain equalizer circuit (4-8 GHz) without significant degradation of overall gain treatment by later circuit. Measured results observe close agreement to simulated results. Insertion loss of first BPF is 0.85dB ±0.2 dB and second BPF is 1 dB±0.3 dB.
两种紧凑c波段微带BPF结构的设计、优化与实现
在过去的二十年里,人们研究了几种微带BPF拓扑结构,以满足3.1-10.6 GHz超宽带(UWB)系统100%以上的分数带宽要求。本文从超宽带BPF设计技术的启发出发,提出了两种紧凑的c波段微带BPF结构。这些c波段BPF设计用于6 GHz的中心频率f0和67%左右的分数带宽,覆盖整个c波段(4-8 GHz)。第一种BPF是由阶跃阻抗低通滤波器(LPF)和最佳分布式短路存根高通滤波器(HPF)相结合实现的。第二个滤波器采用伪数字间阶跃阻抗谐振器(PIDT-SIRS)设计。这两种滤波器都已在ro450b基板的商业印刷电路板(PCB)上实现,每个滤波器占用的面积小于20 mil × 10 mil。这些滤波器需要最小的通频带变化,以便它们可以与增益均衡器电路(4-8 GHz)集成,而不会显着降低后期电路的整体增益处理。测量结果与模拟结果非常吻合。第一BPF插入损耗为0.85dB±0.2 dB,第二BPF插入损耗为1 dB±0.3 dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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