Design and Implementation of Reconfigurable Shift Unit using FPGAs

Abstract

Shift operation is widely used in symmetric-key block ciphers. Since the data width and shift length vary with different algorithms, there had not a general shift unit supporting all shift operations. In this paper, a high-performance and dynamic reconfigurable shift unit is presented, which provides support for all 4/8/28/32/128-bit data width shift operation. To boost up the adaptability, we adopt multilevel technique to implement arbitrary length shift. Compared with traditional schemes, the shift unit not only supports for all shift implementing modes, but also provides possibility for appearance of reconfigurable cryptographic system