Implementation of Multi-Step Look-Ahead Sigma-Delta Modulators Using IC Technology

Abstract

A hardware implementation of Multi-Step Look-Ahead Sigma-Delta Modulators (MSLA SDMs) in IC technology is presented. MSLA SDMs offer superior performance than conventional single-bit SDMs for a multitude of applications relying on single-bit signal representation. However, traditional look-ahead SDMs have very high algorithmic complexity. MSLA SDMs overcome this problem by transforming the minimization problem associated with traditional look-ahead SDMs. A proof-of-concept IC implementation of a specific MSLA SDM is discussed and compared to a conventional single-bit SDM in terms of performance and hardware complexity. It is demonstrated that MSLA SDMs are a viable alternative to conventional single-bit SDMs when better performance with moderate additional hardware complexity are required.