Realization of NMAX and NMIN functions with multi-valued voltage comparators

M. Inaba, K. Tanno, O. Ishizuka
{"title":"Realization of NMAX and NMIN functions with multi-valued voltage comparators","authors":"M. Inaba, K. Tanno, O. Ishizuka","doi":"10.1109/ISMVL.2001.924551","DOIUrl":null,"url":null,"abstract":"In this paper, realization of three fundamental functions, NOT, negated MAX and negated MIN functions, in the voltage-mode quaternary logic is presented. First, the high-performance NOT circuits with the down literal circuits are composed. The proposed NOT circuits have the quantified effect to realize high noise margins in the voltage-mode quaternary logic circuits. Next, we propose the voltage comparator with the NOT circuit, and, as applications of the voltage comparator, NMAX and NMIN circuits are designed. They can realize the negated MAX and the negated MIN functions, respectively. The advantages of these proposed circuits are fabrication with a conventional CMOS process, high noise margins of more than 0.46[V] and low power consumption with peak of less than 350[/spl mu/W] under 3.0[V] of the supply voltage in verification using HSPICE simulations.","PeriodicalId":297353,"journal":{"name":"Proceedings 31st IEEE International Symposium on Multiple-Valued Logic","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"20","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 31st IEEE International Symposium on Multiple-Valued Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.2001.924551","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 20

Abstract

In this paper, realization of three fundamental functions, NOT, negated MAX and negated MIN functions, in the voltage-mode quaternary logic is presented. First, the high-performance NOT circuits with the down literal circuits are composed. The proposed NOT circuits have the quantified effect to realize high noise margins in the voltage-mode quaternary logic circuits. Next, we propose the voltage comparator with the NOT circuit, and, as applications of the voltage comparator, NMAX and NMIN circuits are designed. They can realize the negated MAX and the negated MIN functions, respectively. The advantages of these proposed circuits are fabrication with a conventional CMOS process, high noise margins of more than 0.46[V] and low power consumption with peak of less than 350[/spl mu/W] under 3.0[V] of the supply voltage in verification using HSPICE simulations.
用多值电压比较器实现NMAX和NMIN函数
本文介绍了在电压型四元逻辑中实现NOT、MAX和MIN三种基本函数。首先,设计了具有下文字电路的高性能非电路。该电路具有量化效果,可在电压型四元逻辑电路中实现高噪声裕度。接下来,我们提出了带有NOT电路的电压比较器,并作为电压比较器的应用,设计了NMAX和NMIN电路。它们可以分别实现负MAX和负MIN函数。这些电路的优点是采用传统的CMOS工艺制造,噪声余量超过0.46[V],在3.0[V]的电源电压下,HSPICE模拟验证的峰值功耗低于350[/spl mu/W]。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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