A subspace based channel mismatch estimator for time-interleaved ADC systems

Abstract

Time-interleaved (TI) architecture with several slow but accurate sub-ADCs in parallel is a promising approach to implement high speed sampling rate and high quantization precision simultaneously. A major bottleneck in realizing a TIADC is mismatches such as offset and gain mismatches among channel ADCs as well as timing skew of the clocks distributed to them, which may reduce the achievable linearity and significantly degrade the sampling performance. The fundamental challenge of existing mismatches estimator is getting rid of the interaction between the gain and timing mismatch effects. In this paper, two frequency bins are jointly considered, corresponding to which the linear phased vectors, generated by TI architecture, are studied in terms of their rotational relationships. The timing errors can be directly estimated without the impact of gain mismatch by making use of the fact that the rotational matrix only depends on the timing skew and the frequency spacing between these two frequency bins. Moreover, the presented method is robust to residual offset errors and system noise. The effectiveness of the proposed approach will be verified by the simulated radar echo data.