Methodology of automation process of wafer tests

Abstract

The paper presents a highly efficient system for automated wafer testing implemented on a single software platform. Building fully functional device requires often expensive and time consuming, manufacturing steps. Thus, the ASICs on the wafer ought to be tested in advance to ensure that only the chips with no manufacturing defects will be used in the further process. The presented testing system was used for the tests of the readout chip for hybrid pixel detectors working in a single photon counting mode. The aim of the system is to detect both digital and analog blocks' issues that might cause incorrect chip functioning. The system setup, software implementation, the methodology and the choice of the tests performed are described.