Memory-efficient FFT architecture using R-LFSR based CORDIC common operator

Abstract

In the Software Defined Radio (SDR) area, parameterization is becoming a very important topic in the design of multi-standard terminals. In this context, the Common Operator (CO) technique [1] defines an open and optimized terminal based on a limited set of generic components called Common Operators. The method was already described in [1] and a new relevant possible CO was presented: R-LFSR based CORDIC which is a result of synergy study between CORDIC [2] and Reconfigurable LFSR [3]. We present in this work an original FFT architecture based on the CORDIC in which R-LFSR is exploited. In this case, FFT functions which were performed by CORDIC can be performed by R-LFSR and vice-versa. The novel FFT architecture was successfully implemented on a FPGA Virtex-4 to compare with a FFT using conventional CORDIC. The complexity evaluation is presented.