Dynamic Sharing of On-Chip Scratchpad Memory on Embedded Platforms

Abstract

As more and more functions are integrated on a System-On-Chip (SoC), the number of on-chip peripherals is increasing sharply. Most of these peripheral functions use an internal scratchpad memory for temporary storage of data. Hence, the area and power penalty due to a large number of these scratchpad memories distributed across the die is significant. This paper proposes a centralized scratchpad memory architecture which can be used by different peripherals in a SoC on need basis. Since the use cases on embedded platforms do not require usage of all peripherals simultaneously, the memory footprint in a shared configuration is considerably less compared to cumulative memory of individual modules. Each peripheral has to request for allocation of a chunk of memory for read-write operations. Finally, the peripheral releases the memory after its usage is complete. This paper discusses the micro-architectural details of the memory controller including the several integration challenges. We have shown that such a centralized scheme significantly reduces the area and leakage power consumption of scratchpad memories in several network processor SoCs ranging from 20% to 60%.